Camera Link HS: High-Speed Imaging to 50 Gbps and Up

Hosted by the Association for Advancing Automation (A3), theCamera Link High Speed(Camera Link HS or CLHS) interface protocol is a leader in speed, reliability, ease of development, and bandwidth. Upcoming CLHS releases will push its capabilities even further, making it an even more attractive option for high-speed industrial camera interfaces.

IP Cores Help Ease, Speed Development

One of several strengths of CLHS is its intellectual property (IP) cores, which aid in ease of component development. Currently at version 1.1, CLHS implements its protocol with two physical layer encodings: M Protocol and X Protocol. A3’s VHSIC Hardware Description Language (VHDL) IP cores have been implemented in Altera, Xilinx, and Microsemi field programmable gate arrays (FPGAs).

Available for just $1,000, these open-source IP cores help camera and frame grabber companies speed CLHS development and implementation while also allowing licensed users to customize cores. With the CLHS IP cores, the standard can move to Gbps on an FPGA using 25 Gbps transceivers over fiber with SFP28, QSFP28, or MPO connectors. However, an upcoming specification revision will validate CLHS as having up to 100 Gbps (4 × 25 Gbps) available bandwidth using a single MPO connector.

It is important to understand that the CLHS X Protocol IP core will not change, nor will any CLHS infrastructure, making the move to Gbps inexpensive and straightforward. Since FPGA and physical layer (PHY) technology can support 50 Gbps and higher, the CLHS working group has built a simple bridge from the 64 bit output of the X Protocol IP core physical coding sublayer (PCS) to the 128 bit input of 50 Gbps FPGAs with built-in SerDes blocks. To reach 50 Gbps, the CLHS standard will also introduce a virtual channel using a master and slave channel (or lane) all in one fiber, which will allow component companies to easily migrate to the higher-speed interfacing with minimal impact on hardware and software architecture.

CLHS: High-Speed Imaging Into the Future

Inexpensive IP cores, open-source programming, and advanced line encoding and error correction position CLHS well for the future of high-speed imaging. The interface supports fiber cabling, which will also help with futureproofing, as fiber cable is field installable, modifiable, and more robust and less expensive than copper and can carry more than twice the bandwidth of copper up to many kilometers.

虽然CLHS将继续改进time, its use of 64b/66b encoding in 2012 still provides manufacturers and end users with a long design cycle, from 10 Gbps all the way up to 50 Gbps.

>>> Learn why theCamera Link HS standardcould become the definitive choice in high-speed imaging applications both now and into the future.

>>> Download theCLHS specification here.

>>> Reach out with any questions byemailing Bob McCurrach here.